[amd-platform-discuss] Questions regarding IBS attach function

[Boris Ostrovsky]

Boris Ostrovsky wrote:
> (Question for FMA folks below)
> 
> Hans Rosenfeld wrote:
>> Hi,
>>
>> while trying to understand the IBS provider in detail, I stumbled upon
>> this code in the attach routine:
>>
>>         uint64_t val;
>>         val = rdmsr(0xc001001f);
>>         val = val | 0x400000000000;
>>         wrmsr(0xc001001f, val);
>>         drv_usecwait(10);
>>         pci_putl(0, 0x18, 3, 0x1cc, 0x100);
>>         drv_usecwait(10);
>>
>> This code enables PCI extended config space accesses through I/O
>> registers 0xcf8/0xcfc and then sets up the IBS control register on the
>> northbridge of node 0 to use LVT offset 0. The pci_putl() function is
>> private to the IBS module.
>>
>> According to the BKDG, this setup of the IBS control register should
>> already have been done by the BIOS, but if the driver assumes that it
>> probably is not, it should do it on _all_ nodes, not just node 0. To fix
>> this, the code would need to iterate over all nodes. Is there some public
>> interface to get the node count, or would I have to read it either from
>> the Node ID register, as in i86pc/os/mp_startup.c, or from
>> lgrp_lpat_node_cnt from sys/memnode.h?
> 
> Yes, I also believe this should be done on all nodes. Have you tried collecting 
> data on non-zero nodes? I think it wouldn't work.
> 
> I don't know how you can get node count, but you can loop over all CPUs/cores 
> and read MSRC001_103A (which is a read-only copy of IBS control register) and 
> skip if IBS is enabled (i.e. LVTOffsetVal is 1).
> 

Actually, you would be better off going over PCI space (F3x1CC) since you won't 
need to switch CPUs, just deviceIDs.

-boris