[tesla-dev] Local APIC Timer issue

[Dan Mick]

Mark Haywood wrote:
> Dan Mick wrote:
>> Mark Haywood wrote:
>>> Li, Aubrey wrote:
>>>> Hi Mark,
>>>>
>>>> I noticed local APIC timer is used by cbe in the current system.
>>>>
>>>> And I got the following note from "Intel(r) 64 and IA-32 Architectures
>>>> Software Developer's Manual Volume 3A: System Programming Guide, 
>>>> Part 1"
>>>>
>>>> ----note----
>>>> The APIC timer may temporarily stop while the processor is in deep
>>>> C-states or during transitions caused by Enhanced Intel SpeedStep(r)
>>>> Technology.
>>>> ----note end----
>>>>
>>>> Did you see the timer stop on any platform?
>>>> Did you encounter any problem? I didn't see any code care about this 
>>>> issue during the speed transition,
>>>> ;-)
>>> There isn't any code to handle this because we were unaware of the 
>>> possibility. Maybe we should check with Len concerning the validity 
>>> of the statement and/or whether it only applies to certain 
>>> family/models.
>> We've certainly been told repeatedly about this, and I'm assuming it's 
>> coming, if not now, then soon.
> OK. Make that, "I was unaware of it" as far as SpeedStep was concerned. 
> Maybe I was told and didn't pay attention.
> 
> Apparently, the stoppage is during the frequency transition part of 
> P-state transitions. Typically, the P-state transition latency is on the 
> order of 10 microseconds or less. The effect on cbe is probably not that 
> significant given that our current SpeedStep implementation doesn't 
> change frequencies more than once a second.
> 
> Though I do wonder what effect C1E has on the APIC timer.

The C-state effect is more worrisome.  Obviously we know that S3 stops the 
APIC timer, but I've been led to believe that Cn will too, where n might be 
2 or 3; dunno about C1e.