[tesla-dev] [Bug 4343] kernel panic on penryn platform on which c-state is not supported

[bugzilla-daemon at defect.opensolaris.org]

http://defect.opensolaris.org/bz/show_bug.cgi?id=4343





--- Comment #3 from Aubrey.Li <aubrey.li at intel.com>  2008-11-02 22:48:58 ---
Do we really need to sort the PGs by number of CPUs?
IMHO, the hard coded order is good enough.
========
PGHW_IPIPE,
PGHW_CACHE,
PGHW_FPU,
PGHW_MPIPE,
PGHW_CHIP,
PGHW_MEMORY,
PGHW_POW_ACTIVE,
PGHW_POW_IDLE,
========

When the pg is added to the cmt_pgs, the order is from end to the beginning.
So the final order looks like:
========
PGHW_POW_IDLE,
PGHW_POW_ACTIVE,
PGHW_MEMORY,
PGHW_CHIP,
PGHW_MPIPE,
PGHW_FPU,
PGHW_CACHE,
PGHW_IPIPE,
========

When the policy is CMT_COALESCE, we want core level first and then package
level. And if the policy is CMT_BALANCE, we want the package level first and
then core level. The default order is perfect for the policy. The number of
CPUs seems not match the CMT_COALESCE.

Does this make sense?

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